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AS7C332MNTD18A 3.3V 2M x 18 Pipelined SRAM

AS7C332MNTD18A Description

December 2004 ® AS7C332MNTD18A 3.3V 2M × 18 Pipelined SRAM with NTDTM .
The AS7C332MNTD18A family is a high performance CMOS 32 Mbit synchronous Static Random Access Memory (SRAM) organized as 2,097,152 words × 18 bits and.

AS7C332MNTD18A Features

* Organization: 2,097,152 words × 18 bits
* NTD™ architecture for efficient bus operation
* Fast clock speeds to 200 MHz
* Fast clock to data access: 3.2/3.5/3.8 ns
* Fast OE access time: 3.2/3.5/3.8 ns
* Fully synchronous operation
* Common da

AS7C332MNTD18A Applications

* requiring random access or read-modify-write operations. NTD™ devices use the memory bus more efficiently by introducing a write latency which matches the two-cycle pipelined or one-cycle flow-through read latency. Write data is applied two cycles after the write command and address, allowing the re

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3.3V Pipelined SRAM Alliance Semiconductor Corporation
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