Datasheet Details
| Part number | AS7C332MNTD18A |
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| Manufacturer | Alliance Semiconductor Corporation |
| File Size | 484.78 KB |
| Description | 3.3V 2M x 18 Pipelined SRAM |
| Datasheet |
 AS7C332MNTD18A Datasheet
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General Description
The AS7C332MNTD18A family is a high performance CMOS 32 Mbit synchronous Static Random Access Memory (SRAM) organized as 2,097,152 words × 18 bits and incorporates a LATE LATE Write.
Key Features
- Organization: 2,097,152 words × 18 bits.
- NTD™ architecture for efficient bus operation.
- Fast clock speeds to 200 MHz.
- Fast clock to data access: 3.2/3.5/3.8 ns.
- Fast OE access time: 3.2/3.5/3.8 ns.
- Fully synchronous operation.
- Common data inputs and data outputs www. DataSheet4U. com.
- Asynchronous output enable control.
- Available in 100-pin TQFP package Logic block diagram A[20:0] 21 D.
- Byte write enables.